ESP32-S31
Espressif announces ESP32-S31, a dual-core RISC-V SoC with multi-protocol wireless connectivity and HMI support.
The ESP32-S31 is Espressif's new system-on-chip featuring dual RISC-V cores, Wi-Fi 6 and Bluetooth connectivity, and support for multiple protocols. The page itself consists primarily of navigation menus for Espressif's product ecosystem and development frameworks (ESP-IDF, ESP-Matter, ESP-Brookesia, etc.), with no detailed technical specifications or specifications visible in the provided content. The announcement positions the chip within Espressif's broader lineup of wireless SoCs spanning the ESP32, ESP32-S, ESP32-C, ESP32-H, and ESP32-P series.
What HN community is saying
Commenters praised the move to RISC-V, noting that it simplifies toolchain setup compared to proprietary ARM alternatives. The chip includes SIMD instructions compatible with prior ESP32-S3, though some questioned why Espressif used SIMD instead of RISC-V's vector extensions for compatibility reasons. Discussion revealed the S31 lacks hardware floating-point support and includes dual single-precision FPUs per core. A debate emerged over whether the 320 MHz dual-core could theoretically handle gigabit networking, with skeptics questioning realistic throughput. Dev boards are already available for purchase according to commenters, though module availability on distributors like LCSC remains unclear.